Influence of Composition of SiCN Film for Surface Activated Bonding
authors: Inoue, Fumihiro; Peng, Lan; Iacovo, Serena; Phommahaxay, Alain; Visker, Jakob; Verdonck, Patrick; Meersschaut, Johan; Dara, Praveen; Sleeckx, Erik; Miller, Andy;
publication: ECS Transactions
volume: 86
number: 5
pages: 159
year: 2018
Extreme thinned-wafer bonding using low temperature curable polyimide for advanced wafer level integrations
authors: Bertheau, Julien; Inoue, Fumihiro; Phommahaxay, Alain; Iacovo, Serena; Rassoul, Nouredine; Sleeckx, Erik; Rebibs, Kenneth; Miller, Andy; Beyer, Gerald; Beyne, Eric;
publication: 2018 IEEE 68th Electronic Components and Technology Conference (ECTC)
pages: 86-91
year: 2018
Advances in sicn-sicn bonding with high accuracy wafer-to-wafer (w2w) stacking technology
authors: Peng, L; Kim, SW; Iacovo, S; Inoue, F; Phommahaxay, A; Sleeckx, E; De Vos, J; Miller, A; Beyer, G; Beyne, E;
publication: 2018 IEEE International Interconnect Technology Conference (IITC)
pages: 179-181
year: 2018
3-D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability
authors: Vandooren, Anne; Franco, Jacopo; Parvais, Bertrand; Wu, Z; Witters, L; Walke, A; Li, Wei; Peng, Lan; Deshpande, Veeresh; Bufler, Fabian M;
publication: IEEE Transactions on Electron Devices
volume: 65
number: 11
pages: 5165-5171
year: 2018
3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525° C with improved reliability
authors: Vandooren, Anne; Franco, Jacopo; Parvais, B; Wu, Z; Witters, L; Walke, A; Li, Wei; Peng, Lan; Desphande, Veeresh; Bufler, Fabian M;
publication: 2018 IEEE Symposium on VLSI Technology
pages: 69-70
year: 2018
Hybrid 14nm FinFET-Silicon Photonics Technology for Low-Power Tb/s/mm 2 Optical I/O
authors: Rakowski, M; Ban, Y; De Heyn, P; Pantano, N; Snyder, B; Balakrishnan, S; Van Huylenbroeck, S; Bogaerts, L; Demeurisse, C; Inoue, F;
publication: 2018 IEEE Symposium on VLSI Technology
pages: 221-222
year: 2018
First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers
authors: Vandooren, A; Franco, J; Wu, Z; Parvais, B; Li, W; Witters, L; Walke, A; Peng, L; Deshpande, V; Rassoul, N;
publication: 2018 IEEE International Electron Devices Meeting (IEDM)
pages: 7.1. 1-7.1. 4
year: 2018
Key challenges and opportunities for 3D sequential integration
authors: Vandooren, A; Witters, L; Franco, J; Mallik, A; Parvais, B; Wu, Z; Li, W; Rosseel, E; Hikkavyy, A; Peng, L;
publication: 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
pages: 1月4日
year: 2018
Polymer and Bump Planarization for Fine Pitch Micro-Bump Stacking
authors: Inoue, Fumihiro; Derakhshandeh, Jaber; Moeller, Berthold; Gokita, Yohei; Duval, Fabrice; Bex, Pieter; Capuz, Giovanni; Rebibis, Kenneth June; Miller, Andy; Sleeckx, Erik;
publication: ECS Meeting Abstracts
number: 33
pages: 1135
year: 2018