First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers
authorsVandooren, A; Franco, J; Wu, Z; Parvais, B; Li, W; Witters, L; Walke, A; Peng, L; Deshpande, V; Rassoul, N;
publication2018 IEEE International Electron Devices Meeting (IEDM)
pages7.1. 1-7.1. 4
year2018